IBM Unveils Breakthrough Sub-1 Nanometre Chip Technology
IBM 發表突破性亞奈米晶片技術
更新於: 2026年6月27日 上午05:00
On June 25, 2026, IBM announced a groundbreaking leap in semiconductor engineering with the creation of the world’s first sub-1 nanometer, or 0.7 nm, chip technology.
2026年6月25日，IBM宣布在半導體工程領域取得突破性進展，成功打造出全球首款次1奈米（0.7 nm）晶片技術。
As traditional horizontal scaling reaches its physical limits, IBM has introduced a new paradigm called 'nanostack' architecture.
隨著傳統水平微縮技術達到物理極限，IBM引入了一種名為「奈米堆疊（nanostack）」架構的新範式。
Instead of simply shrinking components, this method utilizes 3D sequential integration to stack transistors vertically.
此方法不只是單純縮小組件，而是利用3D序列整合技術，將電晶體垂直堆疊。
This innovative design allows for incredible density, fitting nearly 100 billion transistors onto a chip the size of a fingernail—double the capacity of previous 2 nm chips.
這種創新設計實現了驚人的密度，能在指甲大小的晶片上容納近1000億個電晶體，容量是先前2 nm晶片的兩倍。
Beyond mere size, the performance benefits are staggering.
除了尺寸之外，效能提升更令人咋舌。
This new technology promises up to 50% higher performance or 70% greater energy efficiency, the latter being a crucial development for the power-hungry AI industry.
這項新技術預計能帶來高達50%的效能提升或70%的能源效率提升，後者對於極度耗電的人工智慧產業而言是至關重要的發展。
IBM anticipates this technology will reach the manufacturing stage within the next five years, ensuring that progress in computing power continues well into the next decade.
IBM預計該技術將在未來五年內進入製造階段，確保計算能力的進步能持續至下一個十年。
